Electrons move faster in Germanium Tin than in Silicon or Germanium

CEA-Leti researchers have demonstrated that electrons and other charge carriers can move faster in germanium tin, enabling lower operation voltages and smaller footprints in vertical transistors.

Germanium–tin transistors exhibit an electron mobility that is 2.5 times higher than a comparable transistor made of pure germanium. GeSn is otherwise compatible with the existing CMOS process for chip fabrication. Because germanium and tin come from the same periodic table group as silicon, these transistors could be integrated directly into conventional silicon chips with existing production lines.

A recently published paper in Nature Communications Engineering, Vertical GeSn Nanowire MOSFETs for CMOS Beyond Silicon, notes that “GeSn alloys offer a tunable energy bandgap by varying the Sn content and adjustable band off-sets in epitaxial heterostructures with Ge and SiGe. In fact, a recent report has shown that the use of Ge0.92Sn0.08 as source on top of Ge nanowires (NWs) enhances the p-MOSFET performances."​​

“In addition to their unprecedented electro-optical properties, a major advantage of GeSn binaries is also that they can be grown in the same epitaxy reactors as Si and SiGe alloys, enabling an all-group IV optoelectronic semiconductor platform that can be monolithically integrated on Si," the paper reports.




That project research included contributions from several organizations in addition to CEA-Leti, which delivered the epitaxial stacks. Epitaxy is carried out on a very ordered template, a silicon substrate, with a very precise crystal structure. By changing the material, CEA-Leti duplicated its diamond crystalline structure in the layers it put on top.

Depositing this kind of stack and mastering the epitaxial-layer growth is an extremely complex step in a process flow requiring patterned cylinders and conformal gate stack deposition – in short, manufacturing the entire device. CEA-Leti, one of the few RTOs globally that is able to deposit such complex in-situ doped Ge/GeSn stacks, performed that part of the joint research reported in the paper.

The work also included scientists from ForschungsZentrum Jülich, Germany; the University of Leeds, United Kingdom; IHP- Innovations for High Performance Microelectronics, Frankfurt (Oder), Germany, and RWTH Aachen University, Germany.

As the honoree, Hartmann presented a paper on May 30, Epitaxy of Group-IV Semiconductors for Nanoelectronics and Optoelectronics, covering how epitaxy can be put to good use to boost properties of devices.



Jean-Michel Hartmann received the Electronics and Photonics Division Award at the recent Electrochemical Society conference in Boston.

Hartmann is a CEA Fellow at CEA-Leti, leader of the working group in IV epitaxy, and the SSURF department's scientific director. His research focuses on the reduced pressure chemical vapor deposition of group-IV semiconductors for nanoelectronics and optoelectronics.

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