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Granite River Labs and Anritsu Announce Complete Automated Test Solution for PCI Express® 5.0 Specification

Granite River Labs (GRL), the world’s leading firm for digital connectivity test solutions and services, and Anritsu Corporation announced that their jointly-developed PCI Express® (PCIe®) 5.0 automated test solution has been approved by PCI-SIG® for “gold suite” product compliance testing.

Granite River Labs and Anritsu Announce Complete Automated Test Solution for PCI Express® 5.0 Specification

The solution combines Anritsu’s Signal Quality Analyzer-R MP1900A BERT series with GRL’s PCI Express 5.0 CEM Specification Receiver and PLL Peaking and Bandwidth test automation software. The Anritsu and GRL solution offer product developers a fast and flexible way to test PCIe 5.0 Host and Add-In Card designs with any Tektronix or Keysight real-rime oscilloscope. The solution compliments GRL’s PCIe 5.0 CEM Transmitter test automation software, also approved by the PCI-SIG for “gold suite” compliance testing, and PCIe 5.0 Base Specification Receiver software , both compatible with Tektronix and Keysight scopes.

Reducing equipment calibration and test time
The GRL software’s simple user interface automates complex PCIe specification testing and significantly reduces the time requires for equipment calibration and testing. In accordance with the PCIe 5.0 CEM specification, the software features automated calibration of signal impairments to achieve stressed Receiver Eye Height and Eye Width, and performs PCIe TX and RX Link Equalization (Link EQ) and PLL Peaking and Bandwidth tests at 8, 16, and 32GT/s. All PCIe CEM compliance tests are automated in a single software framework.

Controlling the cost of test infrastructure
The Anritsu Signal Quality Analyzer-R MP1900A series is a multi-channel BERT for designing and testing next-generation network interfaces, such as 200G/400G/800G Ethernet and high-speed bus interfaces like PCI Express 4.0/5.0 specifications, USB3.2, USB4™, and Thunderbolt™.

Built in PPGs (pulse pattern generators) and error detectors (EDs) allow the MP1900A BERT to generate high-quality waveforms with low intrinsic jitter (115 fs). The instrument also features an integrated jitter generation source (SJ, RJ, SSC, BUJ) and a CM-I/DM-I/white-noise generation source. Along with compliance tests, margin tests, and troubleshooting, the unit also supports variety of other applications, including Link Training and Link Training Status State Machine (LTSSM) analysis functions.

In addition to testing PAM4 optical modules, SERDES, and other technologies used by data center 200G/400G/800G Ethernet systems, the MP1900A BERT also tests PCIe 6.0 (PAM4 32 Gbaud) devices under development to ensure compliance with the latest PCI-SIG standard. This allows enterprises to keep the cost of test infrastructure under control.

"The PCI-SIG appreciates GRL’s continued contributions to the development of PCI Express technology," "GRL's support of PCIe 5.0 Compliance Testing helps our members deliver products to market that are compliant to the specification, interoperable, and robust in applications,” said Al Yanes, Chairperson and President of PCI-SIG.

“Anritsu’s partnership with GRL offers a versatile PCI Express compliance test environment for multi-scope vendors,” “Looking ahead, we also plan to support PCIe 6.0 specification at 64 GT/s to drive innovation in 5G, cloud computing, hyperscale data centers,” said Kohei Ota, General Manager of Anritsu’s Service Infrastructure Solutions Division.

“GRL works closely with PCI-SIG and Anritsu Corporation to help our customers ensure that their products seamlessly interoperate across the entire electronics ecosystem,” “Our automated test solution for PCI Express 5.0 specification is part of that vision. It simplifies and accelerates testing designs to the PCIe Base and CEM Specifications, and offers product developers unprecedented flexibility to choose equipment while reducing technical risks and delivering consistent test results,” said Miki Takahashi, GRL Executive Vice President of Engineering.

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